1. Field
Embodiments of the present invention generally relate to a plasma processing chamber having a lowered flow equalizer and a lower chamber liner.
2. Description of the Related Art
Integrated circuits have evolved into complex devices that can include millions of components (e.g., transistors, capacitors, resistors, and the like) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. The demands for greater circuit density necessitate a reduction in the dimensions of the integrated circuit components. The minimal dimensions of features of such devices are commonly referred to in the art as critical dimensions. The critical dimensions generally include the minimal widths of the features, such as lines, columns, openings, spaces between the lines, and the like.
As these critical dimensions shrink, process uniformity across the substrate becomes paramount to maintain high yields. One problem associated with a conventional plasma etch process used in the manufacture of integrated circuits is the non-uniformity of the etch rate across the substrate, which may be due, in part, to a vacuum pump drawing the etching gas toward the exhaust port and away from the substrate. As gases are more easily pumped from areas of the chamber that are closest to the exhaust port (i.e., the periphery of the substrate), the etching gas is pulled toward the exhaust port and away from the substrate, thereby creating a non-uniform etch on the substrate positioned therein. This non-uniformity may significantly affect performance and increase the cost of fabricating integrated circuits.
Therefore, there is a need in the art for an apparatus for uniformly etching material layers during the manufacture of integrated circuits.